The present invention generally relates to improved Silicon-on-Insulator (SOI) devices. More particularly, the present invention relates to methods for improving the grounding of Silicon-on-Insulator devices and devices having improved grounding characteristics.
Silicon-on-Insulator (SOI) technology is of growing importance in the field of integrated circuits. SOI technology involves forming transistors in a relatively thin layer of semiconductor material overlying a layer of insulating material. More particularly, SOI technology is characterized by the formation of a thin silicon layer (device region) for formation of the active devices over an insulating layer, such as an oxide, which is in turn formed over a substrate. Transistor sources and drains are formed, for example, by implantations into the silicon layer while transistor gates are formed by forming a patterned oxide and conductor layer structure.
Such structures provide a significant gain in performance compared to bulk silicon structures by having lower parasitic capacitance (due to the insulator layer) and increased drain current due to floating body charging effects. This is because no connection is made to the channel region and charging of the floating body provides access towards a majority of carriers which dynamically lower the threshold voltage, resulting in increased drain current. Devices, such as metal oxide silicon field effect transistors (MOSFET), have a number of advantages when formed on SOI wafers versus bulk silicon MOS transistors. These advantages include: reduced source/drain capacitance and hence improved speed performance at higher-operating frequencies; reduced N+ to P+ spacing and hence higher packing density due to ease of isolation; absence of latch-up; lower voltage applications; and higher xe2x80x9csoft errorxe2x80x9d upset immunity (i.e., the immunity to the effects of alpha particle strikes).
Although there are significant advantages associated with SOI technology, there are significant disadvantages as well. For example, an unstable ground plane with respect to the various devices formed in and/or on the SOI substrate can lead to device shorting, reduced life expectancy, poor performance characteristics, etc. Thus, a ground potential which varies can lead to poor or even defective SOI devices.
In view of the aforementioned disadvantages, there is a need for SOI devices of improved quality, particularly SOI devices having improved ground planes, and more efficient methods of making such SOI devices.
As a result of the present invention, an SOI substrate having improved ground plane characteristics relative to the device layer is provided. By forming an SOI substrate according to the present invention, improved performance of devices subsequently formed on the SOI substrate is facilitated. Moreover, forming an SOI substrate in accordance with the present invention does not degrade or deleteriously effect the advantageous properties and characteristics commonly associated with SOI technology (improved speed performance at higher-operating frequencies, higher packing density, absence of latch-up, lower voltage applications, and higher xe2x80x9csoft errorxe2x80x9d upset immunity).
According to an aspect of the invention, a silicon-on-insulator substrate is disclosed which comprises: a silicon substrate layer; a first insulation layer over the silicon substrate layer; a conductive layer over the first insulation layer comprising at least one metal or metal silicide over the first insulation layer; a second insulation layer over the conductive layer; a silicon device layer comprising silicon over the second insulation layer; at least first conductive plug through the silicon substrate and the first insulation layer contacting the conductive layer; and at least one second conductive plug through the silicon device layer and the second insulation layer contacting the conductive layer.
According to another aspect of the invention, a method of forming a silicon-on-insulator substrate is disclosed which comprises the steps of: providing a silicon substrate; depositing a first insulation layer over the silicon substrate; forming a conductive layer over the first insulation layer to a first structure; providing a second structure comprising a silicon device layer and a second insulation layer; bonding the first structure and the second structure together so that the conductive layer is located between the first and second insulation layers; and removing a portion of the silicon device layer thereby providing the silicon-on-insulator substrate having two discrete insulation layers; forming at least one first conductive plug through the silicon substrate and the first insulation layer contacting the conductive layer; and forming at least one second conductive plug through the silicon device layer and the second insulation layer contacting the conductive layer.
According to another aspect of the invention, a method of facilitating a stable ground potential in a silicon-on-insulator substrate comprising bulk silicon, a first insulation layer over the bulk silicon, a second insulation layer over the conductive layer, and a silicon device layer over the second insulation layer is disclosed which comprises the steps of: forming a conductive layer between the first and second insulation layers; forming at least one first conductive plug through the bulk silicon and the first insulation layer so as to contact the conductive layer; and forming at least one second conductive plug through the silicon device layer and the second insulation layer so as to contact the conductive layer.
Due in part to the above methods, silicon-on-insulator substrates can be formed which have improved ground plane characteristics. Additionally, devices made in accordance with the present invention can yield devices which possess improved heat transfer capabilities. Furthermore, devices formed from such silicon-on-insulator substrates yield SOI devices of improved quality and reliability.